The present invention relates to digital video transcoding systems and methods.
Digital transcoding systems are necessary wherever the bit rate of a data bit stream is converted, for example so the data bit stream can be transmitted via a bandwidth-limited transmission channel. Examples of transcoding are described in the published applications WO 97/49206 and DE 196 23 934 A1. Other publications on this subject are found in IEEE Transactions on Consumer Electronics, Vol. 44, No. 1, February 1998, pages 88 to 98 in the article “Transcoder Architectures for Video Coding” and in IEEE International Conference on Imaging Processing, Vol. 3, 1995, pages 408 to 411, in the article “Rate Conversion of MPEG Coded Video by Requantization Process”. 
A main field of application for digital transcoding is the processing of video bit streams. For example, on a DVD video the bit streams are stored in accordance with the MPEG-2 video coding standard. The bit rate of these bit streams can be as high as e.g., 9.8 Mbit/s, and the bit-rate can either be constant or variable in time. However, this maximum bit rate is often too high for distribution in certain transmission channels, such as an optical bus in automobiles, since these bus systems are capable of only a limited and generally constant bit rate. Consequently, a DVD can be adapted for application in automobiles only with a digital transcoder, which modifies both the mean bit rate and the bit-rate characteristic of the video bit streams.
Usually, an MPEG program stream stored on the DVD video includes a video bit stream, several audio bit streams, and subtitle and navigation information. The video bit stream is typically compressed and coded in accordance with the video coding standards MPEG-1 or MPEG-2. Since the video coding standard MPEG-2 is generally used, Table 1 shows some characteristics of the MPEG-2 video bit stream on the DVD video.
TABLE 1DVD video. Some characteristicsof the MPEG-2 video bit stream.Video coding standardMPEG-2, subset of main profile @main levelMPEG-2, subset of simple profile @main levelMaximum bit rate9.8 Mbit/sBit-rate characteristicVariable bit rate (VBR), constantbit rate (CBR)Video systems supportedPAL (625/50), NTSC (525/60)Resolution in pixelsPAL: 720 × 576, 352 × 288NTSC: 720 × 480, 352 × 240Picture refresh frequencyPAL: 25 full pictures/sNTSC: 29.97 full pictures/sMaximum picture group lengthPAL: 15 full pictures(group of pictures, GOP)NTSC: 18 full pictures
The necessity of adapting DVD technology for application in an automobile becomes apparent if one considers the properties of the optical bus, over which the video bit stream is distributed in the automobile. For transmitting the video bit stream, the optical bus supports a bit rate of only 3 to 4 Mbit/s. The bit rate provided is constant in time, for example the same amount of data is transported during every time interval of the same duration. These two properties of the bus impose requirements on the video bit stream to be transmitted. Therefore, the video bit stream must have a bit rate of only 3 to 4 Mbit/s, and this bit rate must be constant in time. Comparison of these requirements with the entries in Table 1 clearly shows that the video bit stream on the DVD video does not meet these requirements. The mean and maximum bit rates on the DVD video are too high, since the video bit streams can have a bit rate up to 9.8 Mbit/s. Furthermore, the video bit streams on the DVD video can have not only a constant bit rate (CBR) but also a variable one (VBR). Bit streams with a variable bit rate have a bit rate that fluctuates in time, and generally they cannot be transmitted at a constant bit rate. Consequently, the video bit streams on the DVD video must be adapted to the properties of the optical bus in automobiles according to the bit rate level and the bit-rate characteristic. This adaptation is provided by a digital transcoder.
FIG. 1 illustrates a system for distributing video bit streams over an optical bus in an automobile. The digital transcoder appears as the interface between two domains with different properties. The development of a conversion algorithm for the transcoder and the implementation of this algorithm in a video processor platform consequently are the objectives of various development projects.
Two requirements for the transcoder have already been formulated in the previous section and can be read off from FIG. 1. The digital transcoder must reduce the bit rate of the input video bit stream and, where appropriate, must modify the bit-rate characteristic, such that a CBR bit stream with a defined bit rate is present at the output of the transcoder.
The first requirement states that techniques must be found to reduce the data quantity of the input video bit stream. The second requirement is fulfilled by a bit-rate control, which utilizes the techniques found above in such a way that the transcoded video bit stream has the desired constant bit rate.
Besides the above-cited requirements for the functions of the transcoder, there are still other requirements for the manner in which these functions are to be implemented. These additional requirements for the implementation of the functions derive from the intended implementation with a video processor. To simplify the implementation, the transcoding algorithm not only should have minimal complexity but also minimal memory. The delay time caused by the bit-rate control should be as short as possible to reduce the transfer time of the bit streams through the system.
Finally, of course, the picture quality of the transcoded video bit stream must be taken into account, because acceptance of the system decisively depends on this. The picture quality should be as good as possible, given fulfillment of the above requirements. What is desired is a transcoding algorithm that presents a sensible compromise between the best possible picture quality, the least possible complication, and the shortest possible delay time.
A known embodiment of a digital transcoder is disclosed in the article cited in the introduction, “Transcoder Architecture for Video Coding,” on page 3, in connection with the block diagram shown there. This block diagram illustration is reproduced in FIG. 2. The known transcoder 4 consists of a recurrent circuit of a complete MPEG-2 video decoder 10 and a complete MPEG-2 video coder 20. The MPEG-2 video decoder 10 has a series circuit that includes an input buffer 11, a variable length code (VLC) decoder 12, a dequantizer 13, an inverse discrete cosine transformation (IDCT) stage 14, and a series-connected addition unit 15. The output signal of the addition stage 15 is conducted to one input of the adder 30 of the MPEG-2 video coder 20, and at the same time is conducted to a second input of the addition stage 15 at a picture memory 16 with series-connected motion compensation stage 17.
The MPEG-2 video coder 20 has a series circuit that includes a DCT stage 24, a subsequent quantizer 21 with a series-connected VLC coder 22, and an output buffer 23. The output of the quantizer 21 is connected to the input of a dequantizer 25, to whose output another IDCT stage 26 is connected. The output of the latter is connected to the input of an addition stage 27. The output of the addition stage 27 is fed back, via a picture memory 28 with a series-connected motion compensation stage 29, to a second input of the addition stage, and also to a second input of the adder 30. Furthermore, a motion estimation stage 29a is coupled to the motion compensation stage 29.
The input video bit stream is completely decoded by such a known digital transcoder, and subsequently is completely recoded. A bit-rate control stage 31 of the MPEG-2 coder 20 adjusts the quantizer 21 in such a way that the desired low constant target bit rate is achieved.
Such a transcoder fulfills the above requirements for the functions of the desired transcoder, but its implementation is too complex. The multiple calculations of the DCT and IDCT, the motion compensation, and especially of the motion estimation creates a complexity that is too great for a reasonable cost hardware realization. The memory requirements are also too large since two pictures must always be stored to implement the motion compensation.
One reason for the complexity of the general transcoder is the lack of communication between the decoder and the coder. The coder cannot access the coding parameters of the input bit stream, which are present in the decoder, and must decide all the coding parameters anew. In particular, the coder must make a new estimate of the motion.
The complexity and expense of the general transcoder can be reduced if not all of the coding parameters must be decided anew and if the appropriate parameters of the input bit stream are utilized. Depending on the number and choice of the coding parameters taken over from the input bit stream, simplified transcoders will result.
A known, simplified digital transcoder, without the feedback shown in FIG. 2 is known, e.g., from FIG. 2 on page 411 of the above-cited publication, “Rate Conversion of MPEG Coded Video by Requantization Process.” An adaptive requantization and bit-rate control is established by the new requantization factor being determined as the product of basis quantization factors and the quotient of the input quantization factors and the average input quantization factors.
This is problematical, because the quantization factors must be related to the corresponding, large data quantities.
Therefore, there is a need for an improved digital transcoding system.